Verification Engineer salaries in Ontario

Your key responsibilities will include crafting test plans, developing SystemVerilog/Verilog/UVM testbenches and tests, and debugging of test failures and…

$159,400–$215,600 a year

Your key responsibilities will include crafting test plans, developing SystemVerilog/Verilog/UVM testbenches and tests, and debugging of test failures and…

$125,800–$170,200 a year

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC)…

$129,600–$179,600 a year

1 day ago

This role involves the complete verification lifecycle—from understanding design specifications and developing verification plans to creating UVM-based…

$104,900–$154,900 a year

Solid understanding of Linux-based environments and development workflows. Proven experience optimizing system resources, including compute environments,…

Master's degree in Science, Engineering, or related field and 1+ years of ASIC design, verification, or related work experience.

$108,000–$158,000 a year

3 days ago