brampton, on data processor Jobs – 86 Openings This Week

Sr. Staff Physical Design Timing Engineer (STA)
Lightmatter —Toronto, ON
- $191,000–$220,000 a year
- Full-time
- Hybrid work
- Engineering
- Master's degree
- Bachelor's
- Commuter benefits
- Disability insurance
Senior Principal Engineer, Architecture ASIC / System
Marvell —Toronto, ON
- $191,600–$255,400 a year
- Computer science
- Doctoral degree
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Senior Electrical Engineer & Team Lead
Kepler Communications —Toronto, ON
- $133,346–$183,346 a year
- Full-time
- Hybrid work
- Engineering
- Laboratory experience
- Bachelor's
- Dental care
- Vision care
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Samee Metals Trading —Hamilton, ON
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- Full-time
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13d
Business Development Manager (Sales)
Doverco/Kilotech/Prisma —Brampton, ON
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Senior ASIC Design Verification Engineer
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- Part-time
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Staff Embedded Engineer
ecobee Ltd —Toronto, ON
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- Full-time
- C++
- Travel
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Electrical Tester - Power Transformers
Stark International —Canada
- $50–$65 an hour
- Travel
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- Electrical Engineering
- Dental care
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Digital Hardware Engineer
Gabriella & Co —Canada
- Overtime
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Senior Principal Engineer, Architecture ASIC / System
Marvell —Toronto, ON
1324b(a)(3), all applicants may be subject to an export license review process prior to employment. Engage with customers, engineering, and marketing to lead…
$191,600–$255,400 a year
Sr. Staff Physical Design Timing Engineer (STA)
Lightmatter —Toronto, ON
Bachelor's degree in Electrical Engineering or Computer engineering. Master's degree in Electrical Engineering or Computer engineering.
$191,000–$220,000 a year

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Sr. Staff Physical Design Timing Engineer (STA)

Lightmatter
Toronto, ON

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Job details

Full-time

Benefits

Extended health care
Commuter benefits
Disability insurance
Dental care
Paid time off
Vision care
Life insurance

Skills

Engineering
Master's degree
Bachelor's
Perl
Computer Engineering
Electrical Engineering
Communication skills
Python

Full job description

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world's first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.

Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!

If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.

Lightmatter is (re)inventing the future of computing with light!

About this role

We are hiring a Physical Design Timing Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team of world-class scientists and engineers in defining how the system will be optimized and trailblaze problems that are new to the industry. If your passion is innovation, solving challenging technical problems and doing impactful work you should join our team.

In this job you will be responsible for timing constraints development, STA and timing closure on leading edge CMOS technologies and flows. This includes synthesis through place and route, timing closure, and tapeout signoff.

Responsibilities

Drive the STA sign-off for our flagship Silicon photonics chips at various technology nodes.
Analyze fab guidelines and work with the methodology team to incorporate sign off corners, margins, and derates into timing analysis flows and methodologies.
Collaborate with the architecture, RTL, and DFT teams to analyze the timing complexities and develop consolidated timing modes and constraints for synthesis, along with PnR and chip timing sign-off flows.
Analyze and understand the tradeoffs between power/performance and area goals to drive them into overall chip implementation flows.
Run full-chip STA and accurately project the timing summary across scenarios.
Leverage Tempus/PrimeTime to automate timing ECO generation for effective closure and support physical design implementation.
Document best practices and lessons learned to drive continuous improvements in future projects.

Qualifications:

Bachelor's degree in Electrical Engineering or Computer engineering
12 years of Physical Design experience, with a minimum of 5 years hands-on experience in ASIC STA and timing constraints development, timing closure with Cadence or Synopsys tools
Experience in driving timing closure by effectively managing on-chip variation derates, optimizing multi-mode multi-corner constraints, and implementing robust clock tree building strategies
Well versed with scripting languages like TCL and Python, PERL, or Shell
Strong problem solving skills with attention to every technical aspect
Be a strong team player with clear and precise communication skills

Preferred Qualifications:

Master's degree in Electrical Engineering or Computer engineering
A minimum of 8 years of hands-on experience in ASIC STA and timing constraints development, timing closure with Cadence or Synopsys tools

Benefits

Comprehensive Health Care Plan (Medical, Dental & Vision)
Retirement Savings Matching Program
Life Insurance (Basic, Voluntary & AD&D)
Generous Time Off (Vacation, Sick & Public Holidays)
Paid Family Leave
Short Term & Long Term Disability
Training & Development
Commuter Benefits
Flexible, hybrid workplace model
Equity grants (applicable to full-time employees)

Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.

Export Control

Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.

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