Date posted 04/20/2026
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You are a passionate engineer with a deep understanding of custom analog layout design, eager to push boundaries and innovate in the semiconductor industry. You thrive in fast-paced environments and are energized by the opportunity to work with cutting-edge technology nodes, including sub-5nm FinFet and Gate-All-Around. With a strong foundation in electrical or computer engineering and over five years of hands-on experience, you possess advanced skills in scripting languages such as Tcl, Perl, and Python, enabling you to develop robust design methodologies and automation solutions. Your curiosity drives you to continually seek improvements in design processes, and you are adept at collaborating across global teams and time zones. You value clear communication, both in identifying technical challenges and presenting solutions, and you are known for your organizational skills and attention to detail. Your ability to debug LVS and DRC reports, coupled with basic knowledge of circuit design and digital synthesis workflows, positions you as a versatile contributor to any project. Above all, you are motivated by the chance to learn, grow, and make a meaningful impact in a supportive, innovative environment.
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Proposing and developing advanced layout design techniques and methodologies, including specification, prototyping, and building solutions with scripting languages (Tcl/Perl/Python).
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Running verification on existing designs to assess PDK update impacts and creating innovative scripts to minimize rework.
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Collaborating with multiple organizations and teams across global time zones to ensure the design environment is optimized for IP design teams.
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Working within a best-in-class IC design environment, utilizing industry-leading tools and custom in-house solutions.
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Driving the adoption of new layout methodologies by training and supporting global design teams.
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Maintaining and improving workflow automation, ensuring high productivity and quality in custom analog layout processes.
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Enhance efficiency and productivity of Synopsys IP design teams by enabling robust and scalable layout methodologies.
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Reduce design cycle times and rework through innovative scripting and workflow automation.
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Accelerate adoption of advanced technologies and nodes, keeping Synopsys at the forefront of semiconductor innovation.
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Foster cross-team collaboration, ensuring seamless integration of layout and design environments across global teams.
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Contribute to the development of industry-leading IP solutions, powering innovations in AI, automotive, IoT, and more.
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Drive continuous improvement and learning within the organization, sharing best practices and expertise with peers.
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BS/MS in Electrical Engineering, Computer Engineering, or related field, with 4+ years of relevant experience.
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Expertise in custom analog layout design, especially with sub-5nm FinFet/Gate-All-Around nodes.
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Proficiency in scripting languages: Tcl, Perl, and Python for workflow automation and prototyping.
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Ability to debug LVS (Layout Versus Schematic) and DRC (Design Rule Check) reports effectively.
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Basic understanding of circuit design and digital synthesis/place & route workflows (ICC2/FC).
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Innovative thinker with a proactive approach to problem-solving.
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Strong communicator, able to articulate technical concepts clearly to diverse audiences.
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Collaborative team player, comfortable working across multiple time zones and organizational boundaries.
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Organized and detail-oriented, with excellent presentation skills.
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Adaptable and resilient, thriving in fast-paced, dynamic environments.
You will join the Technology Enablement team, a global group of experts dedicated to advancing custom analog layout methodologies for Synopsys IP design. The team leverages industry-leading IC design tools and custom in-house solutions, working collaboratively to innovate and optimize workflows across the latest technology nodes. Supported by experienced software and CAD professionals, the team fosters a culture of continuous learning and growth, ensuring Synopsys remains a leader in semiconductor technology.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact [email protected].
