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Senior FPGA Design Engineer
Telesat —Ottawa, ON
- Full-time
- Engineering
- Master's degree
- Bachelor's
3h

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Senior FPGA Design Engineer

Telesat
Ottawa, ON

Apply Now

Job details

Full-time
3 hours ago

Skills

MATLAB
Signal processing
FPGA
Engineering
5G
Master's degree
Verilog
Bachelor's
Ethernet
Simulink
Algorithm design
Computer Engineering
Telecommunication
Agile
Electrical Engineering
Communication skills
Python
Debugging

Full job description

Telesat (Nasdaq and TSX: TSAT) is a leading global satellite operator, providing reliable and secure satellite-delivered communications solutions worldwide to broadcast, telecommunications, corporate and government customers for over 55 years. Backed by a legacy of engineering excellence, reliability and industry-leading customer service, Telesat has grown to be one of the largest and most successful global satellite operators.

Telesat Lightspeed, our revolutionary Low Earth Orbit (LEO) satellite network, scheduled to begin service in 2027, will revolutionize global broadband connectivity for enterprise and Government users by delivering a combination of high capacity, security, resiliency and affordability with ultra-low latency and fiber-like speeds. Telesat is headquartered in Ottawa, Canada, and has offices and facilities around the world.

The company’s state-of-the-art Satellite fleet consists of 12 GEO satellites, the Canadian payload on ViaSat-1 and one LEO 3 demonstration satellite. For more information, follow Telesat on X and LinkedIn or visit www.telesat.com

We are seeking a highly skilled FPGA Designer to join our engineering team in Ottawa, supporting the development of advanced satellite modem technologies. In this role, you will own the design and delivery of FPGA subsystems from architecture definition through hardware validation, contributing to high-performance digital signal processing (DSP) implementations on FPGA platforms. You will work on systems enabling next-generation communications capabilities in demanding environments, requiring strong expertise in FPGA development, modem architectures, and high-speed data processing systems.

Main Responsibilities

Own the design and implementation of FPGA-based digital modem components for satellite or wireless communication systems
Design high-throughput FPGA architectures supporting multi‑Gbps data paths and real-time processing constraints
Develop low-latency DSP blocks (e.g., modulation/demodulation, FEC, filtering, framing)
Translate system and algorithm requirements into efficient and scalable FPGA architectures
Perform RTL design using VHDL and/or Verilog/SystemVerilog
Integrate and optimize designs, including third-party FPGA IP cores, for performance, power, and resource utilization
Develop and execute verification plans, including simulation, testbench creation, and hardware validation
Support full FPGA design lifecycle including synthesis, timing closure, and lab bring-up
Work closely with system architects, algorithm developers, embedded software teams, and hardware engineers to ensure seamless integration
Support hardware bring-up, debugging, and system-level testing in lab environments
Contribute to documentation, design reviews, and continuous improvement of development processes
Participate in design trade-offs and performance analysis for future modem features

Education and Experience

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
8+ years of experience in FPGA design and development (or equivalent combination of education and experience)
Strong proficiency in RTL design using VHDL and/or Verilog/SystemVerilog
Experience with FPGA toolchains (e.g., Xilinx Vivado, Intel Quartus)
Solid understanding of digital signal processing concepts and communication systems
Experience implementing high-speed data paths and pipelined architectures
Familiarity with simulation and verification tools (ModelSim, Questa, VCS, etc.)
Experience with hardware debugging tools (e.g., logic analyzers, ILA)
Strong problem-solving skills and ability to work in a collaborative team environment

Specialized Knowledge, Skills, and Abilities

Experience with satellite communications or wireless modem design
Knowledge of forward error correction (FEC) schemes (LDPC, Turbo, etc.) Familiarity
Familiarity with wideband or high-throughput modem systems (e.g., DVB-S2X, 5G PHY)
Experience with high-speed interfaces (e.g., JESD204, Ethernet, PCIe, SerDes)
Experience with FPGA SoC platforms and integration with embedded processors (e.g., ARM-based systems)
Exposure to high-level synthesis (HLS) tools and methodologies
Experience with MATLAB/Simulink or Python for algorithm development and validation
Understanding of fixed-point design and optimization techniques
Experience with modern verification methodologies (e.g., UVM, constrained-random, coverage-driven verification)
Experience working in Agile or iterative development environments

Soft Skills

Strong communication skills with the ability to clearly present technical concepts
Ability to manage multiple tasks and priorities in a fast-paced environment
Detail-oriented with a focus on quality and reliability
Proactive mindset with a passion for innovation and continuous learning

Working Conditions

Resource is required to be in office four (4) days weekly
Occasional international travel is required in this role
Must qualify for government clearance

At Telesat, we take pride in being an equal opportunity employer that values equality in the workplace. We are committed to providing the best candidate experience possible including any required accommodations at every stage of our interview process. All qualified applicants that have been selected for an interview that require accommodations, are advised to inform the Telesat Talent team accordingly. We will work with you to meet your needs. All accommodation information provided will be treated as confidential.

Commitment: Full Time Hire - (FTE with Benefits)

Department: Lightspeed System Development - Landing Stations and User Terminals

Location: Ottawa, Ontario

Team: User Terminal Segment

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